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hardware user manual TCM-BF537 v1.x TCM-BF537bp v1.x
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 2 ? contact bluetechnix mechatronische systeme gmbh lainzerstra?e 162/3 a-1130 vienna austria/europe office@bluetechnix.at http://www.bluetechnix.com document no.: 100-1225-1.4 document revision 20 date: 2010-11-30
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 3 ? table of contents blackfin pr oducts ............................................................................................................. ................................................................. 6 ? blackfin desi gn serv ice ....................................................................................................... ............................................................ 7 ? 1 ? introduc tion .................................................................................................................. ................................................................ 8 ? 1.1 ? overview ...................................................................................................................... ......................................................... 8 ? 1.2 ? versions ...................................................................................................................... ........................................................... 9 ? 1.3 ? key features .................................................................................................................. ...................................................... 9 ? 1.4 ? target appl ications ........................................................................................................... ................................................ 9 ? 1.5 ? further info rmation ........................................................................................................... ............................................... 9 ? 2 ? specification ................................................................................................................. .............................................................. 10 ? 2.1 ? functional sp ecification ...................................................................................................... .......................................... 10 ? 2.2 ? boot mo de ..................................................................................................................... ..................................................... 11 ? 2.3 ? flash memory map * ) .............................................................................................................................. ........................ 11 ? 2.3.1 ? asynchronous me mory ba nks ..................................................................................................... ...................... 12 ? 2.4 ? sdram memo ry map .............................................................................................................. ....................................... 12 ? 2.5 ? electrical sp ecification ...................................................................................................... ............................................. 12 ? 2.5.1 ? supply vo ltag e ................................................................................................................ ........................................ 12 ? 2.5.2 ? supply voltag e ripple ......................................................................................................... ................................. 13 ? 2.5.3 ? input clock freque ncy ......................................................................................................... ................................ 13 ? 2.5.4 ? real time cl ock crys tal ....................................................................................................... ................................. 13 ? 2.5.5 ? supply cu rrent ................................................................................................................ ........................................ 13 ? 2.6 ? environmental sp ecification ................................................................................................... ..................................... 13 ? 2.6.1 ? temperature ................................................................................................................... ......................................... 13 ? 2.6.2 ? humidi ty....................................................................................................................... ............................................. 13 ? 3 ? TCM-BF537c (connect or version) ................................................................................................ ....................................... 13 ? 3.1 ? mechanical outlin e ............................................................................................................ ............................................. 13 ? 3.2 ? footprint ..................................................................................................................... ........................................................ 15 ? 3.3 ? schematic symbol of connector version ......................................................................................... ....................... 16 ? 3.4 ? connectors pin assignme nt ..................................................................................................... ................................... 17 ? 3.4.1 ? connector x1 C (1-60) ......................................................................................................... .................................. 17 ? 3.4.2 ? connector x2 C (61-120) ....................................................................................................... ............................... 18 ? 4 ? TCM-BF537b (border pad and bga ve rsions) ...................................................................................... ............................ 20 ? 4.1 ? mechanical outlin e ............................................................................................................ ............................................. 20 ? 4.2 ? footprint of border pad baseboard ............................................................................................. .............................. 21 ? 4.3 ? schematic symbol of border pad version ........................................................................................ ....................... 22 ? 4.4 ? border pad pin assignme nt ..................................................................................................... ..................................... 23 ?
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 4 ? 4.5 ? bga pad nu mbering ............................................................................................................. ........................................ 25 ? 4.6 ? footprint of bg a baseboard .................................................................................................... .................................... 25 ? 4.7 ? schematic symbol of bga version ............................................................................................... ............................. 26 ? 4.8 ? bga pin assi gnment ............................................................................................................ ........................................... 27 ? 4.9 ? reset ci rcuit ................................................................................................................. ...................................................... 31 ? 4.10 ? flash memory ex tension pins ................................................................................................... .................................. 31 ? 4.10.1 ? pins fa20 to fa24 ............................................................................................................. .................................... 31 ? 4.10.2 ? wp_fla sh ...................................................................................................................... .......................................... 31 ? 5 ? application exampl e schematics ................................................................................................ ........................................ 32 ? 5.1 ? schematic example for connecting a physical ethe rnet chip ..................................................................... .... 32 ? 5.2 ? schematic example for conne cting a usb 2.0 chip ............................................................................... .............. 33 ? 6 ? software support .............................................................................................................. ........................................................ 34 ? 6.1 ? blacksheep .................................................................................................................... .................................................. 34 ? 6.2 ? uclinux ....................................................................................................................... ......................................................... 34 ? 7 ? anomalies ..................................................................................................................... ............................................................... 34 ? 8 ? production report ............................................................................................................. ....................................................... 35 ? 9 ? product ch anges ............................................................................................................... ........................................................ 36 ? 10 ? document revi sion hist ory ..................................................................................................... ......................................... 36 ? a ? list of figure s and ta bles .................................................................................................... ................................................... 37 ?
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 5 ? ? bluetechnix mechatronische systeme gmbh 2010 all rights reserved. the information herein is given to describe certain comp onents and shall not be considered as a guarantee of characteristics. terms of delivery and rights of technical change reserved. we hereby disclaim any warranties, in cluding but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. bluetechnix makes and you receive no warranties or co nditions, express, implie d, statutory or in any communication with you. bluetechnix sp ecifically disclaims any implied warrant y of merchantability or fitness for a particular purpose. bluetechnix takes no liability for any damages and errors causin g of the usage of this board. the user of this board is responsible by himself for the functionality of his applicat ion. he is allowed to use th e board only if he has the qualification. more information is found in the general terms and conditions (agb). information for further information on technology, delivery terms an d conditions and prices please contact bluetechnix (http://www.blu etechnix.com). warning due to technical requirements components may contain dangerous substances. the core modules and development systems contain esd (electrostatic discharge) sensitive devices. electro-static charges readily accumulate on the human body and equipment and can discharge without detection. permanent damage may occur on devices subjected to high-energy discharges. proper esd precautions are recommended to avoid performance degradation or loss of functionality. unused core modules and development boards should be stored in the protective shipping
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 6 ? blackfin products core modules: tcm-bf518: the new core module cm-bf518 is powered by analog devices' single core adsp- bf518 processor; up to 400mhz, 32mb sdram, up to 8mb flash. the 2x60 pin expansion connectors are backwards compatib le with other core modules. cm-bf527: the new blackfin processor module is powered by analog devices' single core adsp- bf527 processor; key features are usb otg 2.0 and ethernet. the 2x60 pin expansion connectors are backwards compatib le with other core modules. cm-bf533: blackfin pr ocessor module powered by analog devices' single core adsp-bf533 processor; up to 600mhz, 32mb sdram, 2mb flash, 2x60 pin expansion connectors and a size of 36.5x31.5mm. TCM-BF537: blackfin pr ocessor module powered by analog devices' single core adsp-bf537 processor; up to 500mhz, 32mb sdram, 8m b flash, a size of 28x28mm, 2x60 pin expansion connectors, ball grid array or border pads for reflow soldering, industrial temperature range -40c to +85c. cm-bf537e: blackfin processor module powered by analog devices' single core adsp-bf537 processor; up to 600mhz, 32mb sdram, 4mb flash, integrated tp10/100 ethernet physical transceiver, 2x60 pin expansion connectors and a size of 36.5x31.5mm. cm-bf537u: blackfin processor module powered by analog devices' single core adsp-bf537 processor; up to 600mhz, 32mb sdram, 4mb fl ash, integrated usb 2.0 device, 2x60 pin expansion connectors and a size of 36.5x31.5mm. cm-bf548: the new blackfin processor module is powered by analog devices' single core adsp- bf548 processor; key features are 64mb ddr sd-ram 2x100 pin expansion connectors. cm-bf561: blackfin processor module powered by analog devices' dual core adsp-bf561 processor; up to 2x 600mhz, 64mb sdram, 8m b flash, 2x60 pin expansion connectors and a size of 36.5x31.5mm. ecm-bf561: blackfin processor module powered by analog devices' dual core adsp-bf561 processor; up to 2x 600mhz, 128mb sdram, 8m b flash, 2x100 pin expansion connectors and a size of 44x33mm.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 7 ? development boards: eval-bf5xx: low cost blackfin processor evaluation board with one socket for any bluetechnix blackfin core module. addi tional interfaces are available, e.g. an sd-card. dev-bf5xxda-lite: get ready to prog ram and debug bluetechnix core modu les with this tiny development platform including an usb-ba sed debug agent. the dev-bf5xxda-lite is a low cost starter development system including a vdsp++ evaluation software license. dev-bf548-lite: low-cost development board with one socket for bluetechnix cm-bf548 core module. additional interfaces are available, e.g. an sd-card, usb and ethernet. dev-bf548da-lite: get ready to program and debug bl uetechnix cm-bf548 core module with this tiny development platform including an usb-base d debug agent. the dev-bf548da-lite is a low-cost starter development system including a vdsp++ evaluation software license. ext-boards: the following extender boards are av ailable: ext-bf5xx-audio, ext-bf5xx-video, ext- bf5xx-cam, ext-bf5xx-exp-tr, ext-bf5xx- usb-eth2, ext-bf5xx-ad/da, ext-bf548- exp and ext-bf518-eth. furthermore, we offer the development of customized extender boards for our customers. software support: blacksheep: the blacksheep vdk is a multithrea ded framework for the blackfin processor family from analog devices that includes driver suppo rt for a variety of hardware extensions. it is based on the real-time vdk kernel in cluded within the vdsp++ development environment. labview: labview embedded support for blue technix core modules is done by schmid- engineering ag: http://www.schmi d-engineering.ch uclinux: all the core modules are fully support ed by uclinux. the required boot loader and uclinux can be downloaded from: http://blackfin.uclinux.org . upcoming products an d software releases: keep up-to-date with all the changes to the blue technix product line and software updates at: http://www.bluetechnix.com . blackfin design service based on more than five years of experi ence with blackfin, bluetechnix offers development assistance as well as custom design services an d software development.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 8 ? 1 introduction the TCM-BF537 is a chip size core module designed for industrial temperature range and volume production. it combines power supply, ram and flash in to a module as small as a chip pack age. different connector options (ball grid array (bga), border pads (bp) and connectors ) provides solutions for all possible requirements. 1.1 overview the core module TCM-BF537 consists of the following components shown in figure 1-1. figure 1-1: main components of the TCM-BF537 core module ? analog devices blackfin processor bf537 o adsp-bf537bbcz-5a, 500mhz (-40-85c) 32 mb sdram o sdram clock up to 133mhz o see chapter 8 production report up to 64 mb of byte addressable flash o see chapter 8 production report o additional flash memory upon request: it can be connected through the expansion board as parallel flash using asynchronous chip select lines or as spi flash. low voltage reset circuit o resets module if power supply goes below 2.93v. dynamic core voltage control o core voltage adjustable by setting softwa re registers on the blackfin processor o core voltage range: 0.8 C 1.32v
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 9 ? peripherals available on all core module versions o sport 0 o jtag o uart0/uart1 o can o twi (i2c compatible) o spi (serial port interface) o ppi (parallel port interface) o boot mode pins o gpios peripherals available on the connector and bga version only. o data bus o address bus o further gpios o memory control signals 1.2 versions TCM-BF537: connector version 2x60 connector pins TCM-BF537bga: 169 bgas 1.5 mm pitch for volume production TCM-BF537bp: 76 border pads, no data- and address bus on border pads 1.3 key features ? the TCM-BF537, measuring only 28x28mm is the smallest core module available. ? an extended temperature range, suitable for industrial production. ? allows integration on a two layer baseboard. ? reduces development costs, fast time to market. ? very cost effective for small and medium volumes 1.4 target applications ? generic high performance signal processor module ? industrial automation 1.5 further information further information, and document updates are available on the product homepage: http://www.bluetechni x.com/goto/TCM-BF537
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 10 ? 2 specification 2.1 functional specification figure 2-1: detailed block diagram figure 2-1 shows a detailed block diagram of the TCM-BF537 module. beside the sdram and a few other control pins, the TCM-BF537 has most pins of the blackfin processo r on its two 60 pin connectors, or its bga, or its border pads. dynamic voltage control allows reducing power consumpt ion to a minimum adjusting the core voltage and the clock frequency dynamically in accordance to the required processing power. a low voltage reset circuit guarantees a power on reset and rese ts the system when the input voltage drops below 2.93v for at least 140ms. 32 mbyte sdram 256mx16 up to 64 mbyte flash bf537 @ 500mhz dynamic core voltage control low voltage reset 20 bit address bus 16 bit data bus clock mem. control, boot mode, jtag, ethernet data & address bus clock-out ppi, sport0, uart, spi, twi, can, gpio 3v3 power , reset
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 11 ? 2.2 boot mode by default the boot mode = 000 (bmode2 = low, bmode1 = low, bmode0=low). all bmode pins have on board pull down resistors. switch ? settings ? bm2,bm1,bm0 ? description ? 000 ? execute ? from ? 16 \ bit ? external ? memory ? (bypass ? boot ? rom) ? 001 ? boot ? from ? 8 \ bit ? or ? 16 \ bit ? memory ? (eprom/flash) ? 010 ? reserved 011 ? boot ? from ? serial ? spi ? memory ? (eeprom/flash) 100 ? boot ? from ? spi ? host ? (slave ? mode) 101 ? boot ? from ? serial ? twi ? memory ? (eeprom/flash) 110 ? boot ? from ? twi ? host ? (slave ? mode) 111 ? boot ? from ? uart ? host ? (slave ? mode) table 2-1: boot mode TCM-BF537 connect bmode0 to vcc and leave bmode1, bmode2 pins open for boot mode 001 equals to 8 or 16 bit prom/flash boot mode. this is the default boot mode for the blacksheep software. 2.3 flash memory map * ) blackfin ? start ? addr. ? blackfin ? end ? addr. ? fa24 ? (pg15) **) ? fa23 ? (pg14) ? **) ? fa22 ? (pg13) ?? **) ? fa21 ? (pf5) ? fa20 ? (pf4) ? flash ? start ? addr. ? flash ? end ? addr. ? 0x20000000 ? 0x201fffff ? 0 ? 0 ? 0 ? 0 ? 0 ? 0x00000000 ? 0x001fffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 0 ? 0 ? 1 ? 0x00200000 ? 0x003fffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 0 ? 1 ? 0 ? 0x00400000 ? 0x005fffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 0 ? 1 ? 1 ? 0x00600000 ? 0x007fffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 1 ? 0 ? 0 ? 0x00800000 ? 0x009fffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 1 ? 0 ? 1 ? 0x00a00000 ? 0x00bfffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 1 ? 1 ? 0 ? 0x00c00000 ? 0x00dfffff 0x20000000 ? 0x201fffff ? 0 ? 0 ? 1 ? 1 ? 1 ? 0x00e00000 ? 0x00ffffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 0 ? 0 ? 0 ? 0x01000000 ? 0x011fffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 0 ? 0 ? 1 ? 0x01200000 ? 0x013fffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 0 ? 1 ? 0 ? 0x01400000 ? 0x015fffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 0 ? 1 ? 1 ? 0x01600000 ? 0x017fffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 1 ? 0 ? 0 ? 0x01800000 ? 0x019fffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 1 ? 0 ? 1 ? 0x01a00000 ? 0x01bfffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 1 ? 1 ? 0 ? 0x01c00000 ? 0x01dfffff 0x20000000 ? 0x201fffff ? 0 ? 1 ? 1 ? 1 ? 1 ? 0x01e00000 ? 0x01ffffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 0 ? 0 ? 0 ? 0x02000000 ? 0x021fffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 0 ? 0 ? 1 ? 0x02200000 ? 0x023fffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 0 ? 1 ? 0 ? 0x02400000 ? 0x025fffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 0 ? 1 ? 1 ? 0x02600000 ? 0x027fffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 1 ? 0 ? 0 ? 0x02800000 ? 0x029fffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 1 ? 0 ? 1 ? 0x02a00000 ? 0x02bfffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 1 ? 1 ? 0 ? 0x02c00000 ? 0x02dfffff 0x20000000 ? 0x201fffff ? 1 ? 0 ? 1 ? 1 ? 1 ? 0x02e00000 ? 0x02ffffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 0 ? 0 ? 0 ? 0x03000000 ? 0x031fffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 0 ? 0 ? 1 ? 0x03200000 ? 0x033fffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 0 ? 1 ? 0 ? 0x03400000 ? 0x035fffff
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 12 ? 0x20000000 ? 0x201fffff ? 1 ? 1 ? 0 ? 1 ? 1 ? 0x03600000 ? 0x037fffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 1 ? 0 ? 0 ? 0x03800000 ? 0x039fffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 1 ? 0 ? 1 ? 0x03a00000 ? 0x03bfffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 1 ? 1 ? 0 ? 0x03c00000 ? 0x03dfffff 0x20000000 ? 0x201fffff ? 1 ? 1 ? 1 ? 1 ? 1 ? 0x03e00000 ? 0x03ffffff table 2-2: memory map the flash memory is subdivided into addressable banks with 2 mbyte size. the pin-connections for fa22-fa24 can be customized. please contact bluetechnix support for more information. * ) be aware that you have to unlock the flash before starting an erase process! **) only valid if 64 mbyte flash mounted (see chapter 8 production report) 2.3.1 asynchronous memory banks the maximum amount of memory addressa ble by a single asynchronous memory bank, of the blackfin processor is 1mb. on this module, each 2mb segment of flash is addres sed over 2 asynchronous memory banks. in order to be able to use more than 2mb without using more than 2 ba nks, 2 gpios (pf4, pf5) are used to select which 2mb section of the flash is visible in the memory window of the blackfin processor. this frees up the remaining banks for the user. aside from the first 2 async memory banks, which are used for flash addressing, the core module has 2 banks of the asynchronous memory interface available, these can be addressed through the following addresses: bank ? start ? address ? end ? address ? size ? comment ? 0 ? 0x20000000 0x200fffff 1mb (addresses ? flash) ? 1 ? 0x20100000 0x201fffff 1mb (addresses ? flash) ? 2 ? 0x20200000 0x202fffff 1mb use ? nams ? 2 3 ? 0x20300000 0x203fffff 1mb use ? nams ? 3 table 2-3: asynchronous memory banks these memory banks can be used to access va rious memory mapped devi ces or peripherals. *there are 19 address lines (a1 to a19) (the a0 signal is produced through addressing logic on abe0 and abe1), this allows the entire 1mb to be addressable bytewise. see section 5.6, flash memory extension pins. 2.4 sdram memory map start ? addr. ? end ? addr. ? size ? comment ? 0x00000000 ? 0x01ffffff 32mbyte ? 16 ? bit ? memory ? interface ? table 2-4: sdram memory map 2.5 electrical specification 2.5.1 supply voltage ? 3.3v dc +/-10%
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 13 ? 2.5.2 supply voltage ripple ? 100mv peak to peak 0-20 mhz 2.5.3 input clock frequency ? 25mhz the blackfin processor input clock frequency is 25 mhz, this frequency is derived from the on-board crystal/oscillator and drives the blackfin processors cl ock generator. this frequency is also provided on the connector as pin 78 (clkbuf). 2.5.4 real time clock crystal ? 32.768khz 2.5.5 supply current ? maximum current: 300ma at 3.3v ? typical operating conditions at 25c environment temperature: o processor running at 500mhz, core voltage 1.2v , sdram 50% bandwidth utilization at 125mhz; 150ma at 3.3v o processor running at 250mhz, core voltage 0.85v sdram 50% bandwidth ut ilization at 83,3mhz; ; ethernet idle: 85ma at 3.3v 2.6 environmental specification 2.6.1 temperature ? operating at full 500mhz:: -40 to + 85 c 2.6.2 humidity operating: 10% to 90% (non condensing) 3 TCM-BF537c (connector version) 3.1 mechanical outline figure 3-1 shows the top view of the core mo dule. all dimensions are given in millimeters!
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 14 ? figure 3-1: mechanical outline (top view) figure 3-2 shows the bottom view of the core module (connector version). figure 3-2: mechanical outline (bottom view) figure 3-3 shows a side view of the core module with mounted connectors.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 15 ? figure 3-3: side view with connectors mounted the total minimum mounting he ight including receptacle at the motherboard is 5.8mm. 3.2 footprint for the connector version (2x hirose 0.6mm pitch) the footprint for the base board looks like that as shown in figure 3-4. for the baseboard the following connectors have to be used. baseboard ? part ? manufacturer ? manufacturer ? part ? no. ? x1, ? x2 ? hirose ? fx8 \ 60s \ sv table 3-1: baseboard connector types the connectors on the TCM-BF537 are of the following type: part ? manufacturer ? manufacturer ? part ? no. ? x1, ? x2 ? hirose ? 3mm ? height ? fx8 \ 60p \ sv table 3-2: core module connector types figure 3-4: recommended footprint for base board (top view)
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 16 ? 3.3 schematic symbol of connector version figure 3-5: schematics symbol of connector version of the TCM-BF537 rsclk0 / taclk2 1 dr0p ri / taclk4 2 tsclk0 / taclk1 3 dt0pri / spi_ssel2 4 vin 3v3 9 vin 3v3 10 pg0 / ppi1d0 11 pg2 / ppi1d2 12 pg4 / ppi1d4 13 pg6 / ppi1d6 14 pg8 / ppi1d8 / dr1sec 15 pg10 / ppi1d10 / rsclk1 16 pg12 / ppi1d12 / dr1pri 17 pg14 / ppi1d14 / tfs1 18 ppi1sy 3 / pf7 / tmr2 19 ppi1sy 1 / pf9 / tmr0 20 mdc 21 pf3 / rx1 / tmr6 / taci6 22 pf1 / dmar1 / taci1 / rx0 23 p f11 / sp i_mosi 24 p f13 / sp i_sck 25 bmode0 26 gnd 27 tck 28 tdi 29 trst 30 emu 31 tms 32 tdo 33 bmode2 34 mdio 35 bmode1 36 p f12 / sp i_mi so 37 pf0 / dmar0 / tx0 38 p f14 / sp i_ss 39 pf2 / tx1 / tmr7 40 p p i 1clk / p f15 / tmrclk 41 ppi1sy 2 / pf8 / tmr1 42 pg15 / ppi1d15 / dt1pri 43 pg13 / ppi1d13 / tsclk1 44 pg11 / ppi1d11 / rfs1 45 pg9 / ppi1d9 / dt1sec 46 pg7 / ppi1d7 47 pg5 / ppi1d5 48 pg3 / ppi1d3 49 pg1 / ppi1d1 50 gnd 51 gnd 52 dt0sec / spi_ssel7 / can_tx 57 tfs0 / sp i_ssel3 58 dr0sec / taci 0 / can_rx 59 rfs0 / taclk3 60 a1 61 a3 62 a5 63 a7 64 a9 65 a11 66 a13 67 a15 68 a17 69 a19 70 gnd 79 ams3 80 awe 81 clkout 82 d0 83 d2 84 d4 85 d6 86 d8 87 d10 88 d12 89 d14 90 d15 91 d13 92 d11 93 d9 94 d7 95 d5 96 d3 97 d1 98 reset 99 aoe 100 are 101 ams2 102 a18 112 a16 113 a14 114 a12 115 a10 116 a8 117 a6 118 a4 119 a2 120 TCM-BF537 ph15 / miicrs 5 sda 6 ph7 / col 7 ph6 / miiphyint 8 pf6 / tmr3 / spi_ssel4 54 p f10 / sp i_ssel1 55 scl 56 clkbuf 78 abe1 71 abe0 111 erxer / ph14 104 erxclk / ph13 77 erxdv / ph12 105 ardy 76 vdd-rtc 103 erxd3 / ph11 106 erxd1 / ph9 107 etxen / ph4 108 etxd2 / ph2 109 etxd0 / ph0 110 etxd1 / ph1 72 etxd3 / ph3 73 erxd0 / ph8 74 erxd2 / ph10 75 ph5 / miitxclk 53 connectors sport 0 ppi / sport 1 uarts spi jtag can twi powe r gpio data bus a dd r . bus control signals ethernet / gpio connecto r symbol
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 17 ? 3.4 connectors pin assignment please mind the mounted pull up and pul l down resistors on the core module. see the third column of table 3-3 and table 3-4. 3.4.1 connector x1 C (1-60) pin ? no. ? signal ? signal ? type. 1 rsclk0 / taclk2 i/o 2 dr0pri / t aclk4 o 3 t sclk0 / taclk1 i/o 4 dt0pri / spi_ssel2 i 5 ph15 / miicrs i/o 6 sda i/o 7 ph7 / col i/o 8 ph6 / miiphyin t i/o 9 vin 3.3 v pwr 10 vin 3.3v pwr 11 pg0 / ppi1d0 i/o 12 pg2 / ppi1d2 i/o 13 pg4 / ppi1d4 i/o 14 pg6 / ppi1d6 i/o 15 pg8 / ppi1d8 / dr1sec i/o 16 pg10 / ppi1d10 / rsclk1 i/o 17 pg12 / ppi1d12 / dr1pri i/o 18 pg14 / ppi1d14 / tfs1 i/o 19 ppi1sy3/pf7/tmr2 i/o 20 ppi1sy1/pf8/tmr1 i/o 21 mdc i/o 22 pf3 / rx1 / tmr6 / taci6 i/o 23 pf1 / dmar1 / taci1 / rx0 i/o 24 pf11 / spi_mosi i/o 25 pf13 / spi_sc k i/o 26 bmode0 i C 10k pull down 27 gnd pwr 28 t c k i C 10k pull up 29 t di i C 10k pull up 30 trst i C 4k7 pull down 31 emu o 32 t ms i C 10k pull up 33 t do o 34 bmode2 i C 10k pull down 35 mdio i/o C 10k pull up 36 bmode1 i C 10k pull down 37 pf12 / spi_miso i/o 38 pf0 / dmar0 / tx0 i/o 39 pf14 / spi_ss i/o 40 pf2 / tx1 / tmr7 i/o 41 ppi1clk / pf15 / tmrcl k i/o
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 18 ? 42 ppi1sy2 / pf8 / tmr1 i/o 43 pg15 / ppi1d15 / dt1pri i/o 44 pg13 / ppi1d13 / tsclk1 i/o 45 pg11 / ppi1d11 / rfs1 i/o 46 pg9 / ppi1d9 / d t 1sec i/o 47 pg7 / ppi1d7 i/o 48 pg5 / ppi1d5 i/o 49 pg3 / ppi1d3 i/o 50 pg1 / ppi1d1 i/o 51 gnd pwr 52 gnd pwr 53 ph5 / miitxcl k i/o 54 pf6 / tmr3 / spi_ssel4 i/o 55 pf10 / spi_ssel1 i 56 scl i/o 57 dt0sec / cantx / spi_ssel7 o 58 t fs0 / spi_ssel3 i/o 59 dr0sec / taci0 / canrx i 60 rfs0 / taclk3 i/o table 3-3: connector x1 pin assignment note: the processor pins pf4 and pf5 are used for flash addressing on the core module. they are not available on the connectors. signal names correspond to those of the blackfin processor unless otherwise stated. 3.4.2 connector x2 C (61-120) pin ? no. signal ? signal ? type. 61 a1 o 62 a3 o 63 a5 o 64 a7 o 65 a9 o 66 a11 o 67 a13 o 68 a15 o 69 a17 o 70 a19 o 71 abe1 / sdqm1 o 72 ph1/etxd1 i/o 73 ph3/etxd3 i/o 74 ph8/erxd0 i/o 75 ph10/erxd2 i/o 76 adr y i C 10k pull up 77 ph13/erxcl k i/o 78 clkbuf o 79 gnd pwr
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 19 ? 80 ams3 o 81 awe o 82 clkout (sclk) i 83 d0 i/o 84 d2 i/o 85 d4 i/o 86 d6 i/o 87 d8 i/o 88 d10 i/o 89 d12 i/o 90 d14 i/o 91 d15 i/o 92 d13 i/o 93 d11 i/o 94 d9 i/o 95 d7 i/o 96 d5 i/o 97 d3 i/o 98 d1 i/o 99 reset i - see chapter 0 100 aoe o 101 are o 102 ams2 o 103 vdd-rtc pwr 104 ph14/erxer i/o 105 ph12/erxdv i/o 106 ph11/erxd3 pwr 107 ph9/erxd1 i/o 108 ph4/etxen i/o 109 ph2/etxd2 i/o 110 ph0/etxd0 i/o 111 abe0 / sdqm0 o 112 a18 o 113 a16 o 114 a14 o 115 a12 o 116 a10 o 117 a8 o 118 a6 o 119 a4 o 120 a2 o table 3-4: connector x2 pin assignment signal names correspond to those of the blackfin processor unless otherwise stated.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 20 ? 4 TCM-BF537b (border pad and bga versions) 4.1 mechanical outline the two figures below shows the top and bottom view of the core module. all dimensions are given in millimeters! figure 4-1: mechanical outline (top view) figure 4-2: mechanical outline ( bottom view )
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 21 ? figure 4-3 shows a side view of the core module with border pads. figure 4-3: side view of the border pads the total minimum mounting height of the border pad version is only 3.1mm! 4.2 footprint of border pad baseboard figure 4-4 shows the pin assignment of the border pad vers ion. the pin numbering is clockwise ascending. the pins no. 10 and 48 are not present. figure 4-4: border pad footprint for the base board ( top view ) note: conducting paths and vias wi thin the footprint must be solder resistant . do not place any component within the footprint either.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 22 ? 4.3 schematic symbol of border pad version rsclk0 / taclk2 6 dr0pri / t aclk4 8 tsclk0 / taclk1 12 dt0pri / spi_ssel2 14 vin 3v3 28 vin 3v3 49 pg0 / ppi1d0 42 pg2 / ppi1d2 44 pg4 / ppi1d4 46 pg6 / ppi1d6 50 pg8 / ppi1d8 / dr1sec 52 pg10 / ppi1d10 / rsclk1 54 pg12 / ppi1d12 / dr1pri 56 pg14 / ppi1d14 / tfs1 58 ppi1sy3 / pf7 / tmr2 39 ppi1sy1 / pf9 / tmr0 41 pf3 / rx1 / tmr6 / taci6 31 pf1 / dmar1 / taci1 / rx0 27 pf11 / spi_mosi 34 pf13 / spi_sck 36 bmode0 19 tck 20 tdi 22 trst 24 emu 25 tms 23 tdo 21 bmode2 17 bmode1 18 pf12 / spi_miso 35 pf0 / dmar0 / tx0 26 pf14 / spi_ss 37 pf2 / tx1 / tmr7 30 ppi1clk / pf15 / tmrclk 38 ppi1sy2 / pf8 / tmr1 40 pg15 / ppi1d15 / dt1pri 59 pg13 / ppi1d13 / tsclk1 57 pg11 / ppi1d11 / rfs1 55 pg9 / ppi1d9 / dt1sec 53 pg7 / ppi1d7 51 pg5 / ppi1d5 47 pg3 / ppi1d3 45 pg1 / ppi1d1 43 dt0sec / spi_ssel7 / can_tx 13 tfs0 / spi_ssel3 11 dr0sec / taci0 / can_rx 7 rfs0 / taclk3 5 reset 15 TCM-BF537 sda 3 pf6 / tmr3 / spi_ssel4 32 pf10 / spi_ssel1 33 scl 4 clkbuf 1 vdd-rt c 9 gnd 67 gnd 29 borderpads mdc 2 mdio 16 ph15 / miicrs 76 ph6 / miiphyint 66 ph5 / miitxclk 65 erxer / ph14 75 erxclk / ph13 74 erxdv / ph12 73 erxd3 / ph11 72 erxd1 / ph9 70 etxen / ph4 64 etxd2 / ph2 62 etxd0 / ph0 60 etxd1 / ph1 61 etxd3 / ph3 63 erxd0 / ph8 69 erxd2 / ph10 71 ph7 / col 68 u? t-cm-bf537 figure 4-5: schematics of the bo rder pad version of the TCM-BF537bp
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 23 ? 4.4 border pad pin assignment pin ? no. ? signal ? type ? 1 ? clkbuf ? o ? 2 ? mdc ? o ? 3 ? sda ? i/o ? 4 ? scl ? i/o ? 5 ? rfs0 ? / ? taclk3 i/o ? 6 ? rsclk0 ? / ? taclk2 i/o ? 7 ? dr0sec ? / ? taci0 / can_rx i ? 8 ? dr0pri ? / ? taclk4 i ? 9 ? vdd \ rtc ? pwr ? 10 ? not ? available ? 11 ? tfs0 ? / ? spi_ssel3 i/o ? 12 ? tsclk0 ? / ? taclk1 i/o ? 13 ? dt0sec ? / ? spi_ssel7 ? / ? can_tx o ? 14 ? dt0pri ? / ? spi_ssel2 o ? 15 ? reset ? i ? see ? chapter ? 0 ? ? 16 ? mdio ? i/o ? 10k ? pull ? up ? ? 17 ? bmode2 ? i ? 10k ? pull ? down ? ? 18 ? bmode1 ? i ? 10k ? pull ? down ? ? 19 ? bmode0 ? i ? 10k ? pull ? down ? ? 20 ? tck ? i ? 10k ? pull ? up ? ? 21 ? tdo ? o ? 22 ? tdi ? i ? 10k ? pull ? up ? ? 23 ? tms ? i ? 10k ? pull ? up ? ? 24 ? trst ? i ? 4k7 ? pull ? down ? ? 25 ? emu ? o ? 26 ? pf0 ? / ? dmar0 / tx0 i/o ? 27 ? pf1 ? / ? dmar1 / taci1 / rx0 i/o ? 28 ? vin ? 3.3v ? pwr ? 29 ? gnd ? pwr ? 30 ? pf2 ? / ? tx1 ? / ? tmr7 i/o ? 31 ? pf3 ? / ? rx1 ? / tmr6 / taci6 i/o ? 32 ? pf6 ? / ? tmr3 / spi_ssel4 i/o ? 33 ? pf10 ? / ? spi_ssel1 i/o ? 34 ? pf11 ? / ? spi_mosi i/o ? 35 ? pf12 ? / ? spi_miso i/o ? 36 ? pf13 ? / ? spi_sck i/o ? 37 ? pf14 ? / ? spi_ss i/o ? 38 ? ppi1clk ? / ? pf15 / tmrclk i/o ? 39 ? ppi1sy3 ? / ? pf7 / tmr2 i/o ? 40 ? ppi1sy2 ? / ? pf8 / tmr1 i/o ? 41 ? ppi1sy1 ? / ? pf9 / tmr0 i/o ? 42 ? pg0 ? / ? ppi1d0 i/o ? 43 ? pg1 ? / ? ppi1d1 i/o ? 44 ? pg2 ? / ? ppi1d2 i/o ? 45 ? pg3 ? / ? ppi1d3 i/o
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 24 ? ? 46 ? pg4 ? / ? ppi1d4 i/o ? 47 ? pg5 ? / ? ppi1d5 i/o ? 48 ? not ? present \ ? 49 ? vin ? 3.3v ? pwr ? 50 ? pg6 ? / ? ppi1d6 i/o ? 51 ? pg7 ? / ? ppi1d7 i/o ? 52 ? pg8 ? / ? ppi1d8 / dr1sec i/o ? 53 ? pg9 ? / ? ppi1d9 / dt1sec i/o ? 54 ? pg10 ? / ? ppi1d10 / rsclk1 i/o ? 55 ? pg11 ? / ? ppi1d11 / rfs1 i/o ? 56 ? pg12 ? / ? ppi1d12 / dr1pri i/o ? 57 ? pg13 ? / ? ppi1d13 / tsclk1 i/o ? 58 ? pg14 ? / ? ppi1d14 / tfs1 i/o ? 59 ? pg15 ? / ? ppi1d15 / dt1pri i/o ? 60 ? ph0 ? / ? etxd0 i/o ? 61 ? ph1 ? / ? etxd1 i/o ? 62 ? ph2 ? / ? etxd2 i/o ? 63 ? ph3 ? / ? etxd3 i/o ? 64 ? ph4 ? / ? etxen i/o ? 65 ? ph5 ? / ? miitxclk i/o ? 66 ? ph6 ? / ? miiphyint i/o ? 67 ? gnd ? pwr ? 68 ? ph7 ? / ? col ? i/o ? 69 ? ph8 ? / ? erxd0 i/o ? 70 ? ph9 ? / ? erxd1 i/o ? 71 ? ph10 ? / ? erxd2 i/o ? 72 ? ph11 ? / ? erxd3 i/o ? 73 ? ph12 ? / ? erxdv i/o ? 74 ? ph13 ? / ? erxclk i/o ? 75 ? ph14 ? / ? erxer i/o ? 76 ? ph15 ? / ? miicrs i/o table 4-1: border pin assignment signal names correspond to those of the blackfin processor unless otherwise stated. not: please mind the mounted pull up and pull down resistors on the core mo dule. see the third column of table 4-1.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 25 ? 4.5 bga pad numbering a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 b16 b17 c1 c2 c3 c4 c5 c6 c7 c8 c9 c10 c11 c12 c13 c14 c15 c16 c17 d1 d2 d3 d15 d16 d17 e1 e2 e3 e15 e16 e17 f1 f2 f3 f15 f16 f17 g1 g2 g3 g15 g16 g17 h1 h2 h3 h15 h16 h17 j1 j2 j3 j15 j16 j17 k1 k2 k3 k15 k16 k17 l1 l2 l3 l15 l16 l17 m1 m2 m3 m15 m16 m17 n1 n2 n3 n15 n16 n17 p1 p2 p3 p15 p16 p17 r1 r2 r3 r15 r16 r17 t1 t2 t3 u1 u2 u3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 u4 u5 u6 u7 u8 u9 u10 u11 u12 u13 u14 u15 u16 u17 figure 4-6: bga pad numbering ( top view ) 4.6 footprint of bga baseboard figure 4-7 shows the top view of the bga footprint for your base board. figure 4-7: recommended bga footprint for the base board (top view)
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 26 ? 4.7 schematic symbol of bga version rsclk0 / taclk2 f3 dr0pri / taclk4 f1 tsclk0 / taclk1 e2 dt0pri / spi_ssel2 d3 pg0 / ppi1d0 u9 pg2 / ppi1d2 u8 pg4 / ppi1d4 u7 pg6 / ppi1d6 u6 pg8 / ppi1d8 / dr1sec u5 pg10 / ppi1d10 / rsclk1 u4 pg12 / ppi1d12 / dr1pri u3 pg14 / ppi1d14 / tfs1 u2 ppi1sy3 / pf7 / tmr2 t12 ppi1sy1 / pf9 / tmr0 t13 mdc h1 pf3 / rx1 / tmr6 / taci6 t17 pf1 / dmar1 / taci1 / rx0 r16 pf11 / spi_m osi u15 pf13 / spi_sck u14 bmode0 l16 tck m16 tdi n16 trst p16 emu p17 tms n17 tdo m17 bmode2 l17 mdio h2 bmode1 l15 pf12 / spi_m iso t15 pf0 / dmar0 / tx0 r17 pf14 / spi_ss t14 pf2 / tx1 / tmr7 u17 ppi1clk / pf15 / tmrclk u13 ppi1sy2 / pf8 / tmr1 u12 pg15 / ppi1d15 / dt1pri u1 pg13 / ppi1d13 / tsclk1 t3 pg11 / ppi1d11 / rfs1 t4 pg9 / ppi1d9 / dt1sec t5 pg7 / ppi1d7 t6 pg5 / ppi1d5 t7 pg3 / ppi1d3 t8 pg1 / ppi1d1 t9 dt0sec / spi_ssel7 / can_tx e1 tfs0 / spi_ssel3 e3 dr0sec / taci0 / can_rx f2 rfs0 / taclk3 g1 a1 a7 a3 c7 a5 b8 a7 b9 a9 a10 a11 c10 a13 c11 a15 b12 a17 a13 a19 c13 gnd j3 ams3 a3 awe a5 memclk a2 d0 a17 d2 c16 d4 d16 d6 e16 d8 f16 d10 g16 d12 h16 d14 j16 d15 j17 d13 h17 d11 g17 d9 f17 d7 e17 d5 d17 d3 c17 d1 b17 reset d1 aoe b4 are b5 ams2 b3 a18 b13 a16 c12 a14 a12 a12 a11 a10 b10 a8 c9 a6 c8 a4 a8 a2 b7 TCM-BF537 ph15 / miicrs j1 sda g3 ph7 / col n1 ph6 / miiphyint n2 pf6 / tmr3 / spi_ssel4 u16 pf10 / spi_ssel1 t16 scl g2 clkbuf a1 abe1 a6 abe0 b6 erxer / ph14 j2 erxclk / ph13 k1 erxdv / ph12 k2 ardy a4 vdd-rtc h3 erxd3 / ph11 l1 erxd1 / ph9 m1 etxen / ph4 p2 etxd2 / ph2 r2 etxd0 / ph0 t2 etxd1 / ph1 t1 etxd3 / ph3 r1 erxd0 / ph8 m2 erxd2 / ph10 l2 ph5 / miitxclk p1 bga vcc r10 vcc r11 vcc t10 vcc t11 vcc u10 vcc u11 gnd r7 gnd r8 gnd r9 gnd r12 gnd r13 gnd r14 gnd c3 gnd c6 gnd a9 gnd b11 gnd c14 gnd c15 gnd a16 gnd b16 gnd d15 gnd g15 gnd k15 gnd n15 br c1 bgh b2 bg c2 wp_flash b1 nmi d2 fa22 h15 fa23 j15 fa24 k16 figure 4-8: schematics symbol of the bga version of the TCM-BF537bga
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 27 ? 4.8 bga pin assignment pin ? no. signal ? signal ? type. a1 ? clkbuf ? o a2 ? memclk ? o a3 ? ams3 ? o a4 ? ardy ? i ? 10k ? pull ? up ? a5 ? awe ? o a6 ? abe1 ? o a7 ? a1 ? o a8 ? a4 ? o a9 ? gnd ? pwr a10 ? a9 ? o a11 ? a12 ? o a12 ? a14 ? o a13 ? a17 ? o a14 ? n.c. ?\ a15 ? n.c. ? \ a16 ? gnd ? pwr a17 ? d0 ? i/o b1 ? wp_flash ? i ? 10k ? pull ? up ? b2 ? bgh ? o b3 ? ams2 ? o b4 ? aoe ? o b5 ? are ? o b6 ? abe0 ? o b7 ? a2 ? o b8 ? a5 ? o b9 ? a7 ? o b10 ? a10 ? o b11 ? gnd ? pwr b12 ? a15 ? o b13 ? a18 ? o b14 ? n.c. ? \ b15 ? n.c. ?\ b16 ? gnd ? pwr b17 ? d1 ? i/o c1 ? br ? i ? 10k ? pull ? up ? c2 ? bg ? o c3 ? gnd ? pwr c4 ? n.c. ?\ c5 ? n.c. ? \ c6 ? gnd ? pwr c7 ? a3 ? o c8 ? a6 ? o c9 ? a8 ? o c10 ? a11 ? o c11 ? a13 ? o
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 28 ? c12 ? a16 ? o c13 ? a19 ? o c14 ? gnd ? pwr c15 ? gnd ? pwr c16 ? d2 ? i/o c17 ? 343i/o ? i/o d1 ? reset ? i ? ? see ? chapter ? 0 ? d2 ? nmi ? i ? 10k ? pull ? up ? d3 ? dt0pri ? / ? spi_ssel2 o d15 ? gnd ? pwr d16 ? d4 ? i/o d17 ? d5 ? i/o e1 ? dt0sec ? / ? cantx ? / ? spi_ssel7 o e2 ? tsclk0 ? / ? taclk1 i/o e3 ? tfs0 ? / ? spi_ssel3 i/o e15 ? n.c. ? \ e16 ? d6 ? i/o e17 ? d7 ? i/o f1 ? dr0pri ? / ? taclk4 i f2 ? dr0sec ? / ? taci0 ? / ? canrx i f3 ? rsclk0 ? / ? taclk2 i/o f15 ? n.c. ? \ f16 ? d8 ? i/o f17 ? d9 ? i/o g1 ? rfs0 ? / ? taclk3 i/o g2 ? scl ? i/o g3 ? sda ? i/o g15 ? gnd ? pwr g16 ? d10 ? i/o g17 ? d11 ? i/o h1 ? mdc ? i/o h2 ? mdio ? i/o ? 10k ? pull ? up ? h3 ? vdd \ rtc ? pwr h15 ? fa22 ? i ? 10k ? pull ? down ? h16 ? d12 ? i/o h17 ? d13 ? i/o j1 ? ph15 ? / ? miicrs i/o j2 ? ph14 ? / ? erxer i/o j3 ? gnd ? pwr j15 ? fa23 ? i ? 10k ? pull ? down ? j16 ? d14 ? i/o j17 ? d15 ? i/o k1 ? ph13 ? / ? erxclk i/o k2 ? ph12 ? / ? erxdv i/o k3 ? n.c. ?\ k15 ? gnd ? pwr k16 ? fa24 ? i ? 10k ? pull ? down ?
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 29 ? k17 ? n.c. ? \ l1 ? ph11 ? / ? erxd3 pwr l2 ? ph10 ? / ? erxd2 i/o l3 ? n.c. ?\ l15 ? bmode1 ? i ? 10k ? pull ? down ? l16 ? bmode0 ? i ? 10k ? pull ? down ? l17 ? bmode2 ? i ? 10k ? pull ? down ? m1 ? ph9 ? / ? erxd1 i/o m2 ? ph8 ? / ? erxd0 i/o m3 ? n.c. ?\ m15 ? n.c. ? \ m16 ? tck ? i ? 10k ? pull ? up ? m17 ? tdo ? o n1 ? ph7 ? / ? col ? i/o n2 ? ph6 ? / ? miiphyint i/o n3 ? n.c. ?\ n15 ? gnd ? pwr n16 ? tdi ? i ? 10k ? pull ? up ? n17 ? tms ? i ? 10k ? pull ? up ? p1 ? ph5 ? / ? miitxclk i/o p2 ? ph4 ? / ? etxen i/o p3 ? n.c. ?\ p15 ? n.c. ? \ p16 ? trst ? i ? 4k7 ? pull ? down ? p17 ? emu ? o r1 ? ph3 ? / ? etxd3 i/o r2 ? ph2 ? / ? etxd2 i/o r3 ? n.c. ?\ r4 ? n.c. ? \ r5 ? n.c. ?\ r6 ? n.c. ? \ r7 ? gnd ? pwr r8 ? gnd ? pwr r9 ? gnd ? pwr r10 ? vcc ? pwr r11 ? vcc ? pwr r12 ? gnd ? pwr r13 ? gnd ? pwr r14 ? gnd ? pwr r15 ? n.c. ?\ r16 ? pf1 ? / ? dmar1 ? / ? taci1 ? / ? rx0 i/o r17 ? pf0 ? / ? dmar0 ? / ? tx0 i/o t1 ? ph1 ? / ? etxd1 i/o t2 ? ph0 ? / ? etxd0 i/o t3 ? pg13 ? / ? ppi1d13 ? / ? tsclk1 i/o t4 ? pg11 ? / ? ppi1d11 ? / ? rfs1 i/o t5 ? pg9 ? / ? ppi1d9 ? / ? dt1sec i/o
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 30 ? t6 ? pg7 ? / ? ppi1d7 i/o t7 ? pg5 ? / ? ppi1d5 i/o t8 ? pg3 ? / ? ppi1d3 i/o t9 ? pg1 ? / ? ppi1d1 i/o t10 ? vcc ? pwr t11 ? vcc ? pwr t12 ? pf7 ? / ? ppi1sy3 ? / ? tmr2 i/o t13 ? pf9 ? / ? ppi1sy1 ? / ? tmr0 i/o t14 ? pf14 ? / ? spi_ss i/o t15 ? pf12 ? / ? spi_miso i/o t16 ? pf10 ? / ? spi_ssel1 i/o t17 ? pf3 ? / ? rx1 ? / ? tmr6 ? / ? taci6 i/o u1 ? pg15 ? / ? ppi1d15 ? / ? dt1pri i/o u2 ? pg14 ? / ? ppi1d14 ? / ? tfs1 i/o u3 ? pg12 ? / ? ppi1d12 ? / ? dr1pri i/o u4 ? pg10 ? / ? ppi1d10 ? / ? rsclk1 i/o u5 ? pg8 ? / ? ppi1d8 ? / ? dr1sec i/o u6 ? pg6 ? / ? ppi1d6 ? i/o u7 ? pg4 ? / ? ppi1d4 ? i/o u8 ? pg2 ? / ? ppi1d2 ? i/o u9 ? pg0 ? / ? ppi1d0 i/o u10 ? vcc ? i/o u11 ? vcc ? i/o u12 ? pf8 ? / ? ppi1_sy2 ? / ? tmr1 i/o u13 ? pf15 ? / ? ppi1clk ? / ? tmrclk i/o u14 ? pf13 ? / ? spi_sclk i/o u15 ? pf11 ? / ? spi_mosi i/o u16 ? pf6 ? / ? tmr3 ? / ? spi_ssel4 i/o u17 ? pf2 ? / ? tx1 ? / ? tmr7 i/o table 4-2: bga version pin assignment signal names correspond to those of the blackfin processor unless otherwise stated. note: please mind the mounted pull up and pull down resist ors on the core module. see the third column of table 4-2.
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 31 ? 4.9 reset circuit the reset of the flash and the processor are connected to a power monitoring ic. the output can be used as power on reset for external devices, see figure 4-9. figure 4-9: schematic of rese t circuit on the core module 4.10 flash memory extension pins 4.10.1 pins fa20 to fa24 flash ? pin blackfin ? pin fa20 pf4 fa21 pf5 fa22 pg13 fa23 pg14 fa24 pg15 table 4-3: pins fa20 to fa24 all pins are pulled down by default. the signals fa20 and fa21 are used to address the (first) 8mb of flash memory. these signals are connected directly with the blackfin pins pf4 (fa20) and pf5 (fa21) (see ch apter 2.3) so you cannot use fa20 or fa21 for your own purposes! the signals fa22-fa24 can be used to address up to 64mbyte of flash memory (if installed on the core module). the signals fa22-fa23 are connected through a 0r resistor array with the blackfin signals pg13 (fa22), pg14 (fa23) and pg15 (fa24). if you need the signals pg 13-pg15 for your own purposes (for example to use the sport1 interface) and you want to a ddress up to 64mbyte flash memory, so yo u can remove the 0r resistor array and use other gpios for fa22-fa24 (in this case you must connect these gpios externally to fa22-f24). please contact bluetechnix support for further informations. 4.10.2 wp_flash is pulled high by default so flash is unprotected. to write protect the flash connect this pin to gnd. 3.3v reset 470r r12 gnd 1 vdd 3 reset 2 tcm809senb713 u5 reset of adsp-bf5xx gnd 99 reset of flash core ? module external
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 32 ? 5 application example schematics in the following two examples connection of a physical et hernet chip and a usb 2.0 chip to the core module are provided. 5.1 schematic example for connectin g a physical ethernet chip since the adsp-bf537 blackfin chip from analog devices al ready has ethernet functional ity only a physical ethernet chip needs to be connected to the TCM-BF537 core module in order to make use of this feature. figure 5-1: configuration with physical chip designato r v alue part numbe r description quantity c4, c5, c6 10u c0805c106k9pac capacitor non-polarized 3 c7, c8, c9 100n 2238 246 19876 capacitor non-polarized 3 l1, l2 600z 74279265 ferrite 2 r2 10r mc 0.063w 0603 1% 10r resistor 1 r3, r4, r8, r9 49r9 mc 0.063w 0603 1% 49r9 resistor 4 r5, r6, r11 27r mc 0.063w 0603 1% 27r resistor 3 r7 6k49 mc 0.063w 0603 1% 6k49 resistor 1 r10, r12 220r mc 0.063w 0603 1% 220r resistor 2 r13 2k43 multicomp resistor 1 u2 ksz8721bli-lqfp48l 10/100base physical layer transceiver 1 v1, v2 usblc6-2p6 t sv-diode for usb 2.0 2 x3 rjlbc-060tc1 rj45-connector with leds 1 table 5-1: bill of material of sample schematic mdc mdio etxd0 etxd1 etxd2 etxd3 etxen erxd0 erxd1 erxd2 erxd3 erxdv erxclk erxer mii_crs mii_txclk mii_phyint col nreset_eth1 2.5v 2.5v_pll led_speed led_act rx+ rx \ tx \ tx+ 2.5v_va 2.5v_va 2.5v_va 10u c4 10u c5 10u c6 fxsd/fxen 34 rext 37 gnd 44 gnd 8 vdd 7 pd 30 vdd_core 13 gnd 12 speed100/fef 27 collision/nwayen 29 vddpll 47 activity/test 26 fdup lex 28 gnd 23 xtal2 45 clkin/xtal1 46 gnd 35 reset 48 mdio 1 mdc 2 gnd 43 rxd3/phyad 3 rxd2/phyad2 4 rxd1/phyad3 5 rxd0/phyad4 6 rx_dv/crsdv/pcs_lbpk 9 rx_clk 10 rx_er/i so 11 gnd 36 tx_er/txd4 14 tx_clk/refclk 15 tx_en 16 gnd 39 txd0 17 txd1 18 vdd 24 txd2 19 txd3 20 int/phyad0 25 col/rmi i 21 crs/rmi i _btb 22 tx- 40 tx+ 41 vddrx 31 rx- 32 rx+ 33 vddrcv 38 vddtx 42 u2 ks8721 49r9 r3 49r9 r4 49r9 r9 49r9 r8 erxd[3..0] etxd[3..0] xrx+ xrx \ xtx \ xtx+ 27r r6 27r r5 2.5v_va 220r r10 220r r12 3v3 clkbuf gnd gnd etxd[3..0] erxd[3..0] mii_txclk erxdv erxclk erxer mi i_crs col mdio mii_p hyint mdc nreset_eth1 clkbuf etxen 100n c9 gnd 100n c8 gnd gnd gnd 6k49 r7 3v3 3v3 3v3 npd npd 3v3 27r r11 3 td- 2 rd- 8 td+ 1 14 13 rd+ 7 9 11 10 12 rj 45 ? 1:1 ? led x3 1 3 2 5 4 6 d \ tvs \ usb2.0 ?\ > ? invnr: ? 10549 v1 1 3 2 5 4 6 d \ tvs \ usb2.0 ?\ > ? invnr: ? 10549 v2 gnd gnd 2.5v_va 2.5v_va gnd 100n c7 10r r2 2k43 r13 600z l1 600z l2
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 33 ? 5.2 schematic example for connecting a usb 2.0 chip the following example shows how to connect a usb 2.0 chip to the TCM-BF537 core module. figure 5-2: configuration with usb 2.0 chip designator ? value ? part ? number description quantity c1u, c2u 12p 2238 867 15129 capacitor non-polarized 2 c3u, c4u, c5u, c9u, c11u 10n 2238 916 15636 capacitor non-polarized 5 c6u, c10u, c12u 100n 2238 246 19876 capacitor non-polarized 3 c7u, c8u 10u c0805c106k9pac capacitor non-polarized 2 l1u, l2u 220r 74279263 ferrite 2 r1u, r3u, r11u, r12u 10k mc 0.063w 0603 1% 10 k resistor 4 r2u 10k 2350 025 11003 4-resistor array 1 r4u 1k mc 0.063w 0603 1% 1k resistor 1 r5u, r6u 39r mc 0.0654w 0603 1% 39r resistor 2 r7u 2k43 multicomp resistor 1 r8u 1k5 mc 0.063w 0603 1% 1k5 resistor 1 r9u 47k mc 0.063w 0603 1% 47k resistor 1 r10u 1m mc 0.063w 0603 1% 1m resistor 1 u1u net2272rev1a-lf usb 2.0 peripheral controller tqpf 1 v1u cds3c05gta 1 x1u 2411 01 usb-device normal 1 y1u q 30.0-jxs32-12-10/20 crystal oscillator 1 table 5-2: bill of material of sample schematic d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 a1 a2 a3 a4 usbd+ usbd \ vbus usb \ nirq ale 10k 1 2 3 4 8 7 6 5 r17 2k43 r22 nare usb-nams usb-nreset nawe a[7..0] d[15..0] 47k r24 39r r20 39r r21 1k5 r23 gnd gnd 3v3 gnd 3v3 gnd 3v3 gnd 220z l4 220z l3 12p c10 12p c11 gnd a0 usb-ni rq 2v5 2v5a vcc 1 usbd- 2 usbd+ 3 gnd 4 5 6 x4 usb \ b gnd v4 gnd 10n c12 1m r25 a[7..0] usb \ nreset d[15..0] 10u c17 10n c14 10n c15 10n c19 10n c23 100n c20 100n c21 100n c16 10u c18 gnd gnd 3v3 2v5 2v5a net2272rev1a \ lf ld0 19 com 16 rsdm 9 gnd 4 rsdp 5 gnd 10 vddc 1 dreq 62 ld1 20 avss 12 dm 8 vdd33 7 dp 6 avss 14 iow 60 vbus 64 ld3 22 ld2 21 avdd 15 pvdd 11 vdd25 3 reset 58 cs 61 ior 59 xout 26 vssc 56 ld4 23 rref 13 rp u 2 irq 63 vddio 27 vssc 24 xin 25 la3 29 vddio 55 test 18 tmc2 17 lclko 57 eot 52 ale 53 la4 28 la2 30 ld7 37 ld9 39 vddio 42 ld12 45 dack 51 vssio 33 la0 32 la1 31 ld6 36 ld8 38 trst 40 ld10 43 dmard 50 ld15 49 vssio 54 ld5 35 dmawr 34 vssio 41 ld11 44 ld13 46 ld14 47 vddc 48 u3 3v3 gnd gnd 2v5 xc6204 \ 2v5 vin 1 vout 5 gnd 2 ce 3 u4 1u c22 3v3 1 3 4 2 30mhz y1 gnd 1 3 2 5 4 6 d \ tvs \ usb2.0 ?\ > ? invnr: ? 10549 v3 3v3 gnd 100n c13 gnd 3v3 1k5 r19 gnd 10k 1 2 3 4 8 7 6 5 r14 dreq dreq
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 34 ? 6 software support 6.1 blacksheep the core module is delivered with a pre-flashed basic ve rsion of the blacksheep vdk multithreaded framework. it contains a boot-loader for flashing the core module via the serial port. please consult the software development documents. 6.2 uclinux the core module is fully supported by the open source platform at http://blackfin.uclinux.org . since the core modules are pre-flashed with blacksheep you have to flash uboot first. to flash uboot you can use the blacksheep boot-loader. to use the ethernet functionality of the TCM-BF537 co re modules you need the ext-bf5xx-eth-usb blackfin extension board. 7 anomalies for the latest information regarding anomalies for th is product, please consult the product home page: http://www.bluetechni x.com/goto/TCM-BF537 date ? revisions ? description ? ? ? 24.10.2007 ? v1.1 ? v1.2 ? v1.3 ? rtc \ problem: ? the ? clock ? accuracy ? of ? the ? rtc ? is ? much ? less ? than ? specified ? by ? the ? crystal ? (20ppm). ? due ? to ? layout ? issues ? the ? measured ? inaccuracy ? is ? about ? 7 \ 9 ? sec. ? / ? hour. ? the ? rtc ? bug ? affects ? both ? the ? bga ? and ? border ? pad ? versions. ? for ? accurate ? time ? measurements ? please ? use ? the ? main ? crystal ? or ? an ? external ? rtc. ?? table 8-7-1: anomalies
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 35 ? 8 production report for the latest information regarding the productions fo r this product, please consult the product home page: https://support.bluetechnix.at/w iki/revision_report_TCM-BF537x
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 36 ? 9 product changes for the latest product change information please consult the product web-page at: http://www.bluetechni x.com/goto/TCM-BF537 version changes v1.1.x border pad and bga versions a dded with 64mb flash addressing option, 28mmx28mm outline v1.2.x component placement changed (connector version) v1.3.x mount option for 64mb flash addressing (connector version) v1.4.x correction of rtc inaccurateness 10 document revision history version date document revision 20 2010-11-30 changed product picture 19 2010-08-31 complete document revision 18 2010-02-03 redesign manual 17 2009-05-25 t able 4.2 l14 -> j16 symbol bga updated 16 2009-03-19 t able 8.2 new version added 15 2009-01-19 chapter 5-1 new schematic, new part list 14 2008-12-02 chapter 4.9 added pull up/down information added correction of the bga-pin assignment table 13 2008-10-21 pin 48 not available instead of 49 12 2008-09-05 footprints and mechanical drawings updated 11 2008-08-11 english checked for spelling, grammar and clarity 10 2008-08-06 fixed memory map 9 2008 03 27 production report added 8 2007 24 10 rtc problem in the anomaly list added 7 2007 06 04 unlock flash hint, document revision history table 6 2007 04 17 bp and bga symbols corrected; rx1 and tx1 were mixed up 5 2007 04 04 corrections of the description of the bp and bga versions. 4 2007 01 08 corrected typo in page 7 table 2-2: pf5 one time instead of two times pf4 3 2006 10 02 release v1.1 of tcm boards main updates: separate connector, border and bga pad version border pads: 76 border pads without data and address bus pins connector version: as in version v1.0 bga version: additional processor pins , added flash addressing flexibility removed limited address ra nge, all 8mb addressable 2 2006 04 26 updated anomal y list: only 4mb addressable. 2 2006 04 26 updated document: connector symbol, fixed bug naming of pin 22 and pin 40 (connector version) rx and tx was flipped. 1 2006 03 07 first release v1.0 of the document table 10-1: revision history
tcm \ bf537 ? v1.x \ hardware ? user ? manual ?? 37 ? a list of figures and tables figures figure 1-1: main components of the TCM-BF537 core mo dule ...................................................................... .................................. 8 ? figure 2-1: detail ed block diagram ............................................................................................ ............................................................... 10 ? figure 3-1: mechanical outline (t op view) ..................................................................................... ......................................................... 14 ? figure 3-2: mechanical outline (bo ttom vi ew) .................................................................................. .................................................... 14 ? figure 3-3: side view wi th connectors mounted ................................................................................. ................................................ 15 ? figure 3-4: recommended footprin t for base boar d (top view) ................................................................... .................................. 15 ? figure 3-5: schematics symbol of connector version of the tc m-bf537 ........................................................... ......................... 16 ? figure 4-1: mechanical outline (t op view) ..................................................................................... ......................................................... 20 ? figure 4-2: mechanical outline ( bottom view ) ............................................................................................................................. ........ 20 ? figure 4-3: side view of the bord er pads ...................................................................................... ........................................................... 21 ? figure 4-4: border pad footprint for the base board ( top view ) ..................................................................................................... 21 ? figure 4-5: schematics of the bord er pad version of the tcm-b f537bp ........................................................... ........................... 22 ? figure 4-6: bga pad numbering ( top view ) ............................................................................................................................. .............. 25 ? figure 4-7: recommended bga footprin t for the base bo ard (top view) ........................................................... ......................... 25 ? figure 4-8: schematics symbol of the bga version of the tcm-bf5 37bga .......................................................... ...................... 26 ? figure 4-9: schematic of rese t circuit on the core module ..................................................................... .......................................... 31 ? figure 5-1: configuratio n with physic al chip .................................................................................. ....................................................... 32 ? figure 5-2: configuratio n with usb 2.0 chip ................................................................................... ....................................................... 33 ? tables table 2-1: boot mode tcm-b f537 ................................................................................................ .............................................................. 11 ? table 2-2: me mory map ......................................................................................................... ........................................................................ 12 ? table 2-3: asynchrono us memory banks .......................................................................................... ...................................................... 12 ? table 2-4: sdra m memory map ................................................................................................... .............................................................. 12 ? table 3-1: baseboar d connector types .......................................................................................... ........................................................... 15 ? table 3-2: core modu le connector types ........................................................................................ ......................................................... 15 ? table 3-3: connector x1 pin assi gnment ........................................................................................ ......................................................... 18 ? table 3-4: connector x2 pin assi gnment ........................................................................................ ......................................................... 19 ? table 4-1: border pin assign ment .............................................................................................. ................................................................ 24 ? table 4-2: bga versio n pin assi gnment ......................................................................................... .......................................................... 30 ? table 4-3: pins fa20 to fa24 .................................................................................................. ...................................................................... 31 ? table 5-1: bill of material of sample schema tic ............................................................................... ...................................................... 32 ? table 5-2: bill of material of sample schema tic ............................................................................... ...................................................... 33 ? table 8-7-1: anomalies ........................................................................................................ .......................................................................... 34 ? table 10-1: revi sion history .................................................................................................. ....................................................................... 36 ?

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